doxygen/html/Definitions_8h_source.html

/*===========================================================================================*/
/*
01_D�finitions.h
Manuel Tschumi
5   12  2007
12  12  2007(derni�re modif.)

Contient toutes les d�finitions globales

*/
/*===========================================================================================*/
#ifndef Definitionh
#define Definitionh

//#define CAN_PARA_MEM


//#define VERSION 0x5010001 //Carte uC V4 Rumine
//#define VERSION 0x8010001 //Carte uC_V5 petit         EPFL IP ...56.50    CH G1 581
//#define VERSION 0x8020002 //Carte uC_V5 petit, smd    EPFL
//#define VERSION 0x9010001 //LS 1 IP ...56.12  CH G1 581
//#define VERSION 0x9010002 //LS 2 IP ...56.13  CH G1 581
//#define VERSION 0x9010003 //LS 3 IP ...16.195 CH G1 581
//#define VERSION 0x9010003 //PS 3 IP ...16.54  CH F1 502
//#define VERSION 0xA010001 //IV 1 ! 6 Cellules
//#define VERSION 0xA030002 //IV 2
//#define VERSION 0xB010001 //Carte Server mini !!!!!!!!!!!!! Ne pas oublier de mettre uC 64 pin
//#define VERSION 0xC010001 //Meteo
#define VERSION 0xD010001   //Ecran
//#define VERSION 0xE010001 //

//#define VERSION 0x10010001    //Vérsion(FF), Révision (FF), No (FFFF)
/*
0x1000000 Carte uC_V1
0x2000000 Carte uC_V2
0x3000000 Carte uC_V3 connecteur
0x4000000 Carte uC_V3 petit
0x5000000 Carte uC_V4
0x6000000 Carte uC_V4 petit
0x7000000 Carte uC_V5
0x8000000 Carte uC_V5 petit
0x9000000 LS
0xA000000 IV
0xA000000 Server Mini
*/

// Resistance du fil entre le PCB et la sonde PT1000
#define R_FIL_PT1   0.0000  //0.1=1kohm
#define R_FIL_PT2   0.0005


#define ANC_ON
#if ((VERSION&0xFF000000)==0xD000000)
    #define ECR_ON
    #define SVN_ON
#endif
#if ((VERSION&0xFF000000)==0xB000000)
    #define SVN_ON
#endif
#define CLAVIER_ON

#define AUTO_OSCTUN //Pour ajuster la fr�quence du bus dans le 1% (A utiliser pour protocol CAN)
//#define PIC32MX795F512L   //100 PINs

//#define CAN_SCAN
#ifdef CAN_SCAN
    #define BRG_CAN_INI 3
#else
    #define BRG_CAN_INI 3
#endif
/*
 brg @ case_f=11 = f_bus=20 Mhz
 Value  brg     F
 * 0    0       1   Mhz
 * 1    1       500     kHz
 * 2    3       250     kHz
 * 3    7       125     kHz
 * 4    15      62.5    kHz
 * 5    31      31.25   kHz
 * 6    63      15.625  kHz ! Risque de disfonctionnement
 */
#define CASE_F_INI  9
/*
case f  F_bus   can value (from to)
 * 0    16khz   Not suported        Cristal
 * 1    16khz   Not suported        LPRC
 * 2    15.625khzNot suported       FRC/256
 * 3    62.5khz Not suported        FRC/64
 * 4    125khz  Not suported        FRC/32
 * 5    250khz  6   6               FRC/16
 * 6    500khz  5   6               FRC/8
 * 7    1Mhz    4   6               FRC/4
 * 8    2Mhz    3   6               FRC/2
 * 9    4Mhz    2   6               FRC
 * 10   10Mhz   1   6               PLL
 * 11   20Mhz   0   6               PLL
 * 12   40Mhz   0   5               PLL
 * 13   48Mhz   Not suported        PLL
 */

//#define BRG_CAN_INI   1
//#define CASE_F_INI    10

/*
SPI correspondance et vecteur

1   1   23  ! Pas présent pour uC 64 pin
2   2A  31
3   1A  24
4   3A  32

*/


    #define ADC_mSPIxINT_VECTOR         24
    #define ADC_mSPIxINT_PRIORITY_F     ipl4
    #define ADC_mSPIxINT_PRIORITY       4
    #define ADC_mSPIxINT_SUBPRIORITY    1

    #define ADC_mSPIxIntDisable         mSPI1AIntDisable
    #define ADC_SPIxCON                 SPI1ACON
    #define ADC_SPIxBUF                 SPI1ABUF
    #define ADC_SPIxSTATCLR             SPI1ASTATCLR
    #define ADC_mSPIxClearAllIntFlags   mSPI1AClearAllIntFlags
    #define ADC_mSPIxSetIntPriority     mSPI1ASetIntPriority
    #define ADC_mSPIxSetIntSubPriority  mSPI1ASetIntSubPriority
    #define ADC_mSPIxRXIntEnable        mSPI1ARXIntEnable
    #define ADC_SPIxCONSET              SPI1ACONSET
    #define ADC_SPIxBRG                 SPI1ABRG

    #define ADC_SPIxCONCLR              SPI1ACONCLR
    #define ADC_mSPIxRXClearIntFlag     mSPI1ARXClearIntFlag
    #define ADC_SPIxSTATbits            SPI1ASTATbits

#if defined ECR_ON
    #define ECR_mSPIxINT_VECTOR         31
    #define ECR_mSPIxINT_PRIORITY_F     ipl1
    #define ECR_mSPIxINT_PRIORITY       1
    #define ECR_mSPIxINT_SUBPRIORITY    1

    #define ECR_mSPIxIntDisable         mSPI2AIntDisable
    #define ECR_SPIxCON                 SPI2ACON
    #define ECR_SPIxBUF                 SPI2ABUF
    #define ECR_SPIxSTATCLR             SPI2ASTATCLR
    #define ECR_mSPIxClearAllIntFlags   mSPI2AClearAllIntFlags
    #define ECR_mSPIxSetIntPriority     mSPI2ASetIntPriority
    #define ECR_mSPIxSetIntSubPriority  mSPI2ASetIntSubPriority
    #define ECR_mSPIxRXIntEnable        mSPI2ARXIntEnable
    #define ECR_SPIxCONSET              SPI2ACONSET
    #define ECR_SPIxBRG                 SPI2ABRG
    #define ECR_SPIxCONCLR              SPI2ACONCLR
    #define ECR_mSPIxRXClearIntFlag     mSPI2ARXClearIntFlag
    #define ECR_SPIxSTATbits            SPI2ASTATbits
    #define ECR_mSPIxRXClearIntFlag     mSPI2ARXClearIntFlag
#endif


    #define CAN_STBY        _RD10
    #define CAN_STBY_Dir    _TRISD10
    #define CAN_STBY_P      4
    #define CAN_STBY_O      10
    #define CAN_STBY_PO     ((CAN_STBY_P<<8)+CAN_STBY_O)

    #define CARD_BUTTON     _RE8
    #define CARD_BUTTON_Dir _TRISE8
    #define CARD_BUTTON_P       5
    #define CARD_BUTTON_O       8
    #define CARD_BUTTON_PO      ((CARD_BUTTON_P<<8)+CARD_BUTTON_O)

    #define LED_INT     _RC13
    #define LED_INT_Dir _TRISC13
    #define LED_INT_P       3
    #define LED_INT_O       13
    #define LED_INT_PO      ((LED_INT_P<<8)+LED_INT_O)

    #define SNUM_1      _RD8
    #define SNUM_1_Dir  _TRISD8
    #define SNUM_1_P        4
    #define SNUM_1_O        8
    #define SNUM_1_PO       ((SNUM_1_P<<8)+SNUM_1_O)

    #define SNUM_2      _RD9
    #define SNUM_2_Dir  _TRISD9
    #define SNUM_2_P        4
    #define SNUM_2_O        9
    #define SNUM_2_PO       ((SNUM_2_P<<8)+SNUM_2_O)

#if ((VERSION&0xFF000000)==0xD000000)
    //Pin
    //Allimente clavier, incr�mentateur
    #define Clav_ON         temp_port
    #define Clav_ON_Dir     temp_port
    #define Clav_ON_OC      temp_port
    #define Clav_ON_P       0
    #define Clav_ON_O       0
    #define Clav_ON_PO      ((Clav_ON_P<<8)+Clav_ON_O)
    //Pin 42
    #define Clav_I          _RD8
    #define Clav_I_Dir      _TRISD8
    #define Clav_I_P        4
    #define Clav_I_O        8
    #define Clav_I_PO       ((Clav_I_P<<8)+Clav_I_O)
    //Pin 43
    #define Clav_CLK        _RD9
    #define Clav_CLK_Dir    _TRISD9
    #define Clav_CLK_P      4
    #define Clav_CLK_O      9
    #define Clav_CLK_PO     ((Clav_CLK_P<<8)+Clav_CLK_O)

    //Pin 1
    #define LCD_AO          _RE5
    #define LCD_AO_Dir      _TRISE5
    #define LCD_AO_P        5
    #define LCD_AO_O        5
    #define LCD_AO_PO       ((LCD_AO_P<<8)+LCD_AO_O)
    //Pin 3
    #define LCD_CS          _RE7
    #define LCD_CS_Dir      _TRISE7
    #define LCD_CS_P        5
    #define LCD_CS_O        7
    #define LCD_CS_PO       ((LCD_CS_P<<8)+LCD_CS_O)
    //Pin 2
    #define LCD_RST         _RE6
    #define LCD_RST_Dir     _TRISE6
    #define LCD_RST_P       5
    #define LCD_RST_O       6
    #define LCD_RST_PO      ((LCD_RST_P<<8)+LCD_RST_O)
    //Pin 64
    #define LCD_RETRO       _RE4
    #define LCD_RETRO_Dir   _TRISE4
    #define LCD_RETRO_P     5
    #define LCD_RETRO_O     4
    #define LCD_RETRO_PO    ((LCD_RETRO_P<<8)+LCD_RETRO_O)
#else
    #ifdef CLAVIER_ON
    //Pin
    //Allimente clavier, incr�mentateur
    #define Clav_ON         temp_port
    #define Clav_ON_Dir     temp_port
    #define Clav_ON_OC      temp_port
    #define Clav_ON_P       0
    #define Clav_ON_O       0
    #define Clav_ON_PO      ((Clav_ON_P<<8)+Clav_ON_O)
    //Pin 42
    #define Clav_I          _RD8
    #define Clav_I_Dir      _TRISD8
    #define Clav_I_P        4
    #define Clav_I_O        8
    #define Clav_I_PO       ((Clav_I_P<<8)+Clav_I_O)
    //Pin 43
    #define Clav_CLK        _RD9
    #define Clav_CLK_Dir    _TRISD9
    #define Clav_CLK_P      4
    #define Clav_CLK_O      9
    #define Clav_CLK_PO     ((Clav_CLK_P<<8)+Clav_CLK_O)

    #endif
#endif


   /*I/O NUMERIQUE*/

    //Pin 6
    #define EXT1            temp_port
    #define EXT1_Dir        temp_port
    #define EXT1_P      0
    #define EXT1_O      0

    //Pin 7
    #define EXT2            temp_port
    #define EXT2_Dir        temp_port
    #define EXT2_P      0
    #define EXT2_O      0
/*
    //Pin 56
    #define EXT3            temp_port
    #define EXT3_Dir        temp_port
    #define EXT3_P      0
    #define EXT3_O      0

    //Pin 18
    #define EXT4            temp_port
    #define EXT4_Dir        temp_port
    #define EXT4_P      0
    #define EXT4_O      0

    //Pin 19
    #define EXT5            _RE9
    #define EXT5_Dir        _TRISE9
    #define EXT5_P      5
    #define EXT5_O      9
    //Pin 66
    #define EXT6            _RA14
    #define EXT6_Dir        _TRISA14
    #define EXT6_P      1
    #define EXT6_O      14
    //Pin 68
    #define EXT7            _RD8
    #define EXT7_Dir        _TRISD8
    #define EXT7_P      4
    #define EXT7_O      8
    //Pin 71
    #define EXT8            _RD11
    #define EXT8_Dir        _TRISD11
    #define EXT8_P      4
    #define EXT8_O      11
    //Pin 79
    #define EXT9            _RD12
    #define EXT9_Dir        _TRISD12
    #define EXT9_P      4
    #define EXT9_O      12
    //Pin 80
    #define EXT10           _RD13
    #define EXT10_Dir       _TRISD13
    #define EXT10_CN        CNENbits.CNEN19
    #define EXT10_P     4
    #define EXT10_O     13
    //Pin 82
    #define EXT11           _RD5
    #define EXT11_Dir       _TRISD5
    #define EXT11_P     4
    #define EXT11_O     5
    //Pin 83
    #define EXT12           _RD6
    #define EXT12_Dir       _TRISD6
    #define EXT12_P     4
    #define EXT12_O     6
*/


    //Pin 1
    #define DAC_CS1         temp_port
    #define DAC_CS1_Dir     temp_port
    #define DAC_CS1_P       0
    #define DAC_CS1_O       0
    #define DAC_CS1_PO      ((DAC_CS1_P<<8)+DAC_CS1_O)
    //Pin 3
    #define DAC_CS2         temp_port
    #define DAC_CS2_Dir     temp_port
    #define DAC_CS2_P       0
    #define DAC_CS2_O       0
    #define DAC_CS2_PO      ((DAC_CS2_P<<8)+DAC_CS2_O)
    //Pin 4
    #define DAC_CS3         temp_port
    #define DAC_CS3_Dir     temp_port
    #define DAC_CS3_P       0
    #define DAC_CS3_O       0
    #define DAC_CS3_PO      ((DAC_CS3_P<<8)+DAC_CS3_O)


    //Pin 87
    #define ADC_CS1         _RE5
    #define ADC_CS1_Dir     _TRISE5
    #define ADC_CS1_P       5
    #define ADC_CS1_O       5
    #define ADC_CS1_PO      ((ADC_CS1_P<<8)+ADC_CS1_O)
    //Pin 88
    #define ADC_CS2         _RE6
    #define ADC_CS2_Dir     _TRISE6
    #define ADC_CS2_P       5
    #define ADC_CS2_O       6
    #define ADC_CS2_PO      ((ADC_CS2_P<<8)+ADC_CS2_O)
    //Pin 91
    #define ADC_CS3         _RG9
    #define ADC_CS3_Dir     _TRISG9
    #define ADC_CS3_P       7
    #define ADC_CS3_O       9
    #define ADC_CS3_PO      ((ADC_CS3_P<<8)+ADC_CS3_O)
    //Pin 92
    #define ADC_CS4         temp_port
    #define ADC_CS4_Dir     temp_port
    #define ADC_CS4_P       0
    #define ADC_CS4_O       0
    #define ADC_CS4_PO      ((ADC_CS4_P<<8)+ADC_CS4_O)
    //Pin 93
    #define ADC_CS5         _RE4
    #define ADC_CS5_Dir     _TRISE4
    #define ADC_CS5_P       5
    #define ADC_CS5_O       4
    #define ADC_CS5_PO      ((ADC_CS5_P<<8)+ADC_CS5_O)
    //Pin 94
    #define ADC_CS6         _RE3
    #define ADC_CS6_Dir     _TRISE3
    #define ADC_CS6_P       5
    #define ADC_CS6_O       3
    #define ADC_CS6_PO      ((ADC_CS6_P<<8)+ADC_CS6_O)
    //Pin 97
    #define ADC_CS7         _RE2
    #define ADC_CS7_Dir     _TRISE2
    #define ADC_CS7_P       5
    #define ADC_CS7_O       2
    #define ADC_CS7_PO      ((ADC_CS7_P<<8)+ADC_CS7_O)
    //Pin 98
    #define ADC_CS8         _RE1
    #define ADC_CS8_Dir     _TRISE1
    #define ADC_CS8_P       5
    #define ADC_CS8_O       1
    #define ADC_CS8_PO      ((ADC_CS8_P<<8)+ADC_CS8_O)
    //Pin 99
    #define ADC_CS9         _RD5
    #define ADC_CS9_Dir     _TRISD5
    #define ADC_CS9_P       4
    #define ADC_CS9_O       5
    #define ADC_CS9_PO      ((ADC_CS9_P<<8)+ADC_CS9_O)
    //Pin 100
    #define ADC_CS10        _RD7
    #define ADC_CS10_Dir    _TRISD7
    #define ADC_CS10_P      4
    #define ADC_CS10_O      7
    #define ADC_CS10_PO     ((ADC_CS10_P<<8)+ADC_CS10_O)
    //Pin 99
    #define ADC_CS11        _RD6
    #define ADC_CS11_Dir    _TRISD6
    #define ADC_CS11_P      4
    #define ADC_CS11_O      6
    #define ADC_CS11_PO     ((ADC_CS11_P<<8)+ADC_CS11_O)
    //Pin 100
    #define ADC_CS12        temp_port
    #define ADC_CS12_Dir    temp_port
    #define ADC_CS12_P      0
    #define ADC_CS12_O      0
    #define ADC_CS12_PO     ((ADC_CS12_P<<8)+ADC_CS12_O)


    #define ADC_CS13        temp_port
    #define ADC_CS13_Dir    temp_port
    #define ADC_CS13_P      0
    #define ADC_CS13_O      0
    #define ADC_CS13_PO     ((ADC_CS13_P<<8)+ADC_CS13_O)

    #define ADC_CS14        temp_port
    #define ADC_CS14_Dir    temp_port
    #define ADC_CS14_P      0
    #define ADC_CS14_O      0
    #define ADC_CS14_PO     ((ADC_CS14_P<<8)+ADC_CS14_O)

    #define ADC_CS15        temp_port
    #define ADC_CS15_Dir    temp_port
    #define ADC_CS15_P      0
    #define ADC_CS15_O      0
    #define ADC_CS15_PO     ((ADC_CS15_P<<8)+ADC_CS15_O)

    #define ADC_CS16        temp_port
    #define ADC_CS16_Dir    temp_port
    #define ADC_CS16_P      0
    #define ADC_CS16_O      0
    #define ADC_CS16_PO     ((ADC_CS16_P<<8)+ADC_CS16_O)


#endif